
Capgemini Engineering
Capgemini Engineering is the leading company in Research and Development (R&D). With collaboration from more than 52,000 engineers and scientists worldwide, we use R&D to help our clients create intelligent products, operations, and services, contributing to accelerate their journey towards the Intelligent Industry.
About company Lisbon
November 5, 2026
Hybrid
Sobre a vaga
As a Senior Physical Design Engineer, you will be responsible for driving physical design activities across the implementation flow, from floorplanning through sign-off and tape-out. You will work on complex designs and advanced technology nodes.
O que vais fazer
- Perform block and full-chip Physical Design using advanced technology nodes (10nm and below)
- Perform floorplanning, partitioning, power planning, placement, Clock Tree Synthesis (CTS), routing, and optimization
- Drive timing analysis and timing closure, including signal integrity and noise analysis
- Generate and implement functional and timing ECOs
- Perform physical verification activities, including Formal Verification, EM/IR, DRC, LVS, Antenna, and ERC analysis and fixes
- Work on Low Power design implementation and related methodologies
- Develop scripts for clock skew analysis, critical path analysis, I/O interfaces, and constraint partitioning and budgeting
- Support sign-off and tape-out activities
- Work closely with multidisciplinary engineering teams throughout the design implementation and closure process
O que é pedido
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- 6+ years of experience in Physical Design or related ASIC implementation activities
- Experience with advanced technology nodes of 10nm and below
- Experience working on complex designs with 500K to 1M+ instances
- Strong hands-on experience with Synopsys and/or Cadence Physical Design and timing analysis tools
- Solid experience in floorplanning, power planning, placement, CTS, routing, and design optimization
- Knowledge of synthesis flows and DFT scan insertion and coverage
- Strong knowledge of Static Timing Analysis (STA), signal integrity, and timing closure
- Experience with functional and timing ECO generation and implementation
- Hands-on experience with EM/IR, DRC, LVS, Antenna, and ERC analysis and fixes
- Experience with sign-off and tape-out activities
- Proficiency in scripting languages and automation tools such as Perl, TCL, Python, and Makefile
- Good command of English, both written and spoken
- Strong problem-solving skills, technical autonomy, and ability to work effectively in multidisciplinary environments
Valorizado
- Experience with top-level floorplanning and pin assignment is considered a plus
O que é oferecido
- Join a multicultural and inclusive team environment
- Enjoy a supportive atmosphere promoting work life balance
- Hybrid work
- Your career growth is central to our mission
- Access valuable training and certifications in cutting edge technologies
- Engage in exciting national and international projects
- Health and life insurance
- Referral program with bonuses for talent recommendations
- Great office locations
Benefícios e vantagens (8)
- Acções da empresa
- Comida, fruta e bebida
- Flex benefits
- Flexibilidade de horário
- Mais de 22 dias de férias
- Programa de descontos
- Seguro de saúde
- Suporte psicológico